Principal Engineer / Technical Team Lead, Hardware Security Platform

Project description

AMD is building a hardware-assisted security platform that uses silicon-level Performance Monitoring Counters (PMCs) and on-chip machine learning to detect advanced endpoint threats, including ransomware, fileless malware, and cryptojacking, at the processor layer, below OS-based evasion, on a Windows 11 endpoint platform. The platform collects CPU behavioral telemetry, classifies it through an ML inference engine, and exposes threat signals to security-software partners through a standardized API. The project covers the full engineering path from silicon telemetry and data generation through ML training and validation, low-latency Windows runtime integration, lab qualification, and partner integration. The Technical Team Lead will own the end-to-end technical direction of the platform and coordinate decisions across CPU telemetry, Windows systems software, machine learning, security validation, and partner-facing interfaces. This is a hands-on principal engineering role combining architecture ownership, technical leadership, and cross-functional delivery. The role requires regular on-site work in Gdańsk. Additional implementation details will be shared during the recruitment process in line with the applicable confidentiality requirements.

Responsibilities

• Own the end-to-end technical architecture of the hardware-assisted threat-detection platform, covering CPU telemetry collection, Windows systems components, ML inference, partner-facing SDK/API integration, and platform security mechanisms. Define the technical strategy, architectural boundaries, interfaces, and integration model across the Lab, ML, and Real-Time workstreams. Lead cross-functional architectural decisions involving processor telemetry, Windows kernel and user-space components, model inference, system performance, endpoint-security requirements, and partner integration. Establish and maintain technical quality standards, architecture principles, design-review practices, and engineering acceptance criteria. Define measurable efficacy and performance objectives, including detection quality, false-positive behavior, inference latency, system overhead, reliability, and API compatibility. Lead technical evaluation of trade-offs between model quality, telemetry coverage, runtime performance, implementation complexity, and system resource consumption. Own the technical strategy for the partner-facing SDK/API, including interface stability, versioning, compatibility, diagnostics, and integration guidance. Coordinate the technical relationship with approved security-software integration partners. Lead end-to-end validation gates across representative workloads, threat categories, system configurations, and hardware platforms. Ensure that technical decisions, interfaces, assumptions, risks, and known limitations are documented and traceable. Identify, communicate, and mitigate program-level technical risks and cross-workstream dependencies. Provide hands-on technical guidance and design support when complex issues span hardware, drivers, systems software, ML, and security. Mentor senior engineers across the Lab, ML, and Real-Time workstreams and help them resolve cross-disciplinary technical problems. Represent the platform in client architecture reviews, partner discussions, and approved external technical engagements. Work with project stakeholders to translate technical progress, constraints, and risks into clear decisions and priorities. Support the transition from Proof of Concept toward a scalable productization architecture if the initial phase is successful.

SKILLS

Must have

• 8+ years of progressive software, systems, platform, hardware, security, or machine-learning engineering experience. Substantial experience operating as a Principal Engineer, Staff Engineer, Senior Staff Engineer, Technical Lead, Systems Architect, or equivalent technical authority. Demonstrated hands-on technical depth in at least one of the following areas, with credible experience in at least one additional area: 1. CPU and platform engineering: CPU microarchitecture, processor telemetry, PMCs/PMUs, performance profiling, platform firmware, UEFI/BIOS, silicon validation, or comparable low-level platform technologies. 2. Windows systems and kernel engineering: Windows kernel-mode drivers, WDF/WDM/KMDF, driver-to-user-space communication, WinDbg, ETW/ETL, concurrency, low-latency systems, or performance-sensitive runtime development. 3. Endpoint security: Endpoint-security or EDR architecture, system monitoring, behavioral detection, malware analysis, threat telemetry, security-agent development, or comparable defensive-security platforms. 4. ML systems: Production ML inference pipelines, model-runtime integration, ONNX Runtime, OpenVINO, GPU/NPU inference, edge inference, or performance optimization for deployed ML models. Working literacy across the remaining technical areas and the ability to lead specialists without claiming equal hands-on depth in every discipline. Experience making and documenting architecture decisions across multiple components, engineering disciplines, or organizational boundaries. Experience leading a complex multi-disciplinary engineering effort from definition and prototype through integration and validation. Experience defining measurable technical KPIs, performance budgets, quality gates, acceptance criteria, or engineering readiness criteria. Ability to evaluate system-level trade-offs involving performance, reliability, security, compatibility, maintainability, and delivery risk. Strong technical communication skills across engineering, partner, project-management, and executive audiences. Ability to mentor senior engineers, facilitate design reviews, resolve technical disagreements, and drive decisions to closure. Ability to remain hands-on in architecture reviews, debugging, prototyping, performance analysis, or other technically complex work. Must be based in Gdańsk or willing to relocate to the Gdańsk area. University degree in computer science, electrical engineering, computer engineering, cybersecurity, or an equivalent field.

Nice to have

Experience with hardware-assisted security technologies on a major processor architecture. Experience architecting endpoint-security, EDR, anti-malware, behavioral-detection, or system-monitoring products. Familiarity with hardware performance counters, processor telemetry, instruction-based sampling, or silicon-level performance analysis. Experience with Windows driver development, driver signing, HLK testing, or WHQL certification processes. Prior WHQL delivery is useful for later productization but is not required for the Proof-of-Concept phase. Experience integrating machine-learning inference into low-level, performance-sensitive, edge, endpoint, or embedded systems. Experience with ONNX Runtime, OpenVINO, DirectML, GPU/NPU runtimes, model quantization, or inference-performance optimization. Experience developing SDKs or APIs for external engineering partners, including interface versioning and backward compatibility. Experience working with security-software vendors or managing joint technical integration programs. Experience with malware research, threat intelligence, safe sample handling, controlled security validation, or security-lab governance. Experience with silicon validation, firmware, UEFI/BIOS, hardware attestation, trusted execution, secure boot, or platform-rooted security. Experience defining detection-efficacy metrics, false-positive targets, performance budgets, or end-to-end validation gates. Experience moving an early-stage R&D or Proof-of-Concept system toward production architecture. Patent portfolio, technical publications, open-source contributions, conference presentations, or standards participation in a relevant technical area.