Lab Engineer - Senior Member of Technical Staff (SMTS)

Project description

AMD is building a hardware-assisted security platform that uses silicon-level Performance Monitoring Counters (PMCs) and on-chip machine learning to detect advanced endpoint threats (ransomware, fileless malware, cryptojacking) at the processor layer, below OS-based evasion. The platform collects CPU behavioral telemetry, classifies it via an ML inference engine, and exposes threat signals to security-software partners through a standardized API. The team covers the full stack: silicon telemetry, ML training/validation, real-time inference, lab qualification and CI/CD.

Responsibilities

• Lead the design of the hardware threat detection validation lab, including automation infrastructure, dataset management and safety controls for malware handling. Define and own the lab engineering roadmap, aligning test coverage to product milestones. Architect scalable PMC telemetry collection pipelines across malware variants and multiple Zen-generation platforms. Drive malware dataset expansion strategy across ransomware, cryptomining, fileless malware and exploit categories. Mentor MTS-level lab engineers; conduct technical reviews of test plans, automation code and validation reports. Define feature engineering requirements from raw PMC telemetry with the ML team and validate training-data statistical quality. Establish lab qualification criteria for the kernel-mode PMU driver and certify production readiness. Lead security-software partner technical onboarding in the lab.

SKILLS

Must have

• 7+ years of hardware validation, silicon bring-up or security lab engineering experience. Deep understanding of x86-64 CPU microarchitecture and hardware performance monitoring infrastructure. Proven ability to lead technical projects and mentor junior engineers. Strong Python and/or C/C++; experience with large-scale test automation frameworks. Experience with malware behavior analysis, sandbox environments or security telemetry data. Demonstrated track record of owning validation quality metrics end-to-end.

Nice to have

Experience with AMD processor architecture or AMD profiling tools. Published or presented technical work in hardware security or performance monitoring. Familiarity with enterprise security software partner APIs. Experience with instruction-based sampling or branch prediction telemetry.